OVONIC MEMORY DEVICES PAST AND PRESENT
The general concept of utilizing electrically writeable and erasable phase change materials (i.e., materials which can be electrically switched between generally amorphous and generally crystalline states) for electronic memory applications is well known in the art, as is disclosed, for example, in U.S. Pat. No. 3,271,591 to Ovshinsky, issued Sep. 6, 1966 and in U.S. Pat. No. 3,530,441 to Ovshinsky, issued Sep. 22, 1970, both of which are assigned to the same assignee as the present invention, and both disclosures of which are incorporated herein by reference (hereinafter the "Ovshinsky patents").
As disclosed in the Ovshinsky patents, such phase change materials can be transformed between structural states of generally amorphous and generally crystalline local order or between different detectable states of local order across the entire spectrum between completely amorphous and completely crystalline states. That is, the Ovshinsky patents describe that the electrical switching of such materials is not required to take place between completely amorphous and completely crystalline states but rather can be in incremental steps reflecting changes of local order to provide a "gray scale" represented by a multiplicity of conditions of local order spanning the spectrum between the completely amorphous and the completely crystalline states. The early materials described by the Ovshinsky patents could also, if required, be switched between just the two structural states of generally amorphous and generally crystalline local order to accommodate the storage and retrieval of single bits of encoded binary information.
The multivalue-digital-multibit storage of the present invention differs from previous multibit storage disclosed in, for example, U.S. Pat. No. 5,687,112 to Ovshinsky et al., the disclosure of which is hereby incorporated by reference, in that the instant multibit storage is provided in multivalue, digital format while the previous multibit storage was achieved using grey scale analog storage. That is, in the prior art Ovonic memory multibit storage, the state of the device was determined by reading the resistance of the device on an analog scale. The entire grey scale dynamic range of resistance was divided into sub-ranges and each of these sub-ranges was assigned a specific state of programming for the device. The device was programmed to a specific resistance value within any one of the sub-ranges by providing the memory element with the proper current pulse of appropriate amplitude and duration. Once the resistance of the element was read, it was compared to the sub-range values to determine the state of programming of the element.
In the present Ovonic memory multivalue-digital-multibit storage, the device has only two general states of resistance, a high resistivity state and a low resistivity state. However, the device can be set very reliably from the high resistance state to the low resistance state by a single current pulse defined herein as a "set curret pulse". The set current pulse has an amplitude and a duration which is sufficient to transform the volume of memory material from the high resistance state to the low resistance state. The amplitude of the set current pulse is defined herein as the "set amplitude" and the duration of the set current pulse is defined herein as the "set duration". The act of transforming the volume of memory material from the high resistance state to the low resistance state is referred to herein as "setting" the volume of memory material from the high resistance state to the low resistance state.
This, by itself, is not what allows multivalue-digital-multibit storage. What is truly amazing about the instant Ovonic memory elements is that the set current pulse can be divided into sub-interval pulses and, with application of each sub-interval pulse, the resistance of the memory device does not substantially change until the total integrated duration of the sub-interval pulses is equal to or greater than the "set duration" described above. Once the final sub-interval pulse has delivered the last increment of the energy, the device is transformed to the low resistance state.
Thus, the "set duration" of the set current pulse can be divided into a desired number of sub-intervals. The number of sub-intervals corresponds to the total number of multivalue-digital programming states of the element. (In one embodiment, the total number of programming states is one greater than the number of sub-intervals). Once a specific number of sub-interval current pulses have been applied, the present state of the memory element is read by applying additional sub-interval programming pulses until the memory element is transformed from its high resistance state to its low resistance state. By reading the resistance of the element between each of the additionally applied sub-interval pulses, the number of additional pulses may be determined and compared to the number of total programming states. The difference is the present state of the memory element.
The process of reading the present state of the memory element changes the present state and is thus a "destructive read". Hence, after the memory element is read it must be "reprogrammed." This is done by first resetting the device to the high resistance state with a high amplitude current pulse referred to herein as a "reset current pulse", and then apply the number of sub-interval current pulses needed to return the element to the "present state" prior to the read operation.
FIG. 1 is a plot of the amplitude of an applied current pulse versus device resistance for an Ovonic memory element. Referring to FIG. 1, the different programming regimes can be distinguished. In the left side of the curve, the resistance of the device remains substantially constant (i.e., in its high resistance state) until a current pulse of sufficient energy is applied. The device is then transformed from its high resistance state to its low resistance state.
As the amplitude of the applied current pulse increases, the resistance of the device increases from the low resistance state to the high resistance state. This increase is both gradual and reversible as indicated by the arrows pointing in either direction up and down the right side of the curve. In this regime, the Ovonic memory element may be programmed to any resistance within a dynamic range of resistance values by applying a current pulse of appropriate amplitude. This type of programming scheme provides for analog, multistate, directly overwritable data storage.
The method of programming of the present invention exploits the left side of the curve in FIG. 1. In this regime, both the amplitudes and durations of the current pulses used for programming the device are important. The transition on this side of the curve is not reversible, as indicated by the single arrow on the left side of the curve. That is, once the device has made the transition from the high resistance state to the low resistance state, the device cannot be reset to the high resistance state by applying a programming pulse of reduced current. Instead, the device may be reset to the high resistance state by a high-amplitude current pulse (i.e., a "reset pulse") that drives the resistance up the right side of the curve. As described above, and as will be further described hereinbelow, the digital multivalue capability of the device, when programmed in this regime, stems from the ability of the Ovonic memory device to "accumulate" or "integrate" the energy of each program current pulse applied to the device.
The Ovonic memory element can store multiple bits of information in a single memory element, or, as described hereinbelow, can be used to provide a range of interconnectivities between the "neurons" of an artificially intelligent neural network. The number of bits of multibit storage (or fractions thereof) or the number of interconnectivity states depends upon the number of programming states (sub-intervals) that the element can provide. These devices, in addition to being useful for the data storage, and neural network applications described below, are also useful for such applications as multivalue-logic devices, comparative-logic applications, compliment base-n logic applications, counting applications, etc.